tac0S
Template Affectional Command Operating System
switch.h
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1 
11 /*
12  Copyright (c) 1992-1993 The Regents of the University of California.
13  All rights reserved. See copyright.h for copyright notice and limitation
14  of liability and disclaimer of warranty provisions.
15  */
16 
17 #ifndef SWITCH_H
18 #define SWITCH_H
19 
20 #include "copyright.h"
21 
22 #ifdef HOST_MIPS
23 
24 /* Registers that must be saved during a context switch.
25  * These are the offsets from the beginning of the Thread object,
26  * in bytes, used in switch.s
27  */
28 #define SP 0
29 #define S0 4
30 #define S1 8
31 #define S2 12
32 #define S3 16
33 #define S4 20
34 #define S5 24
35 #define S6 28
36 #define S7 32
37 #define FP 36
38 #define PC 40
39 
40 /* To fork a thread, we set up its saved register state, so that
41  * when we switch to the thread, it will start running in ThreadRoot.
42  *
43  * The following are the initial registers we need to set up to
44  * pass values into ThreadRoot (for instance, containing the procedure
45  * for the thread to run). The first set is the registers as used
46  * by ThreadRoot; the second set is the locations for these initial
47  * values in the Thread object -- used in Thread::AllocateStack().
48  */
49 
50 #define InitialPC s0
51 #define InitialArg s1
52 #define WhenDonePC s2
53 #define StartupPC s3
54 
55 #define PCState (PC/4-1)
56 #define FPState (FP/4-1)
57 #define InitialPCState (S0/4-1)
58 #define InitialArgState (S1/4-1)
59 #define WhenDonePCState (S2/4-1)
60 #define StartupPCState (S3/4-1)
61 
62 #endif // HOST_MIPS
63 
64 #ifdef HOST_SPARC
65 
66 /* Registers that must be saved during a context switch. See comment above. */
67 #define I0 4
68 #define I1 8
69 #define I2 12
70 #define I3 16
71 #define I4 20
72 #define I5 24
73 #define I6 28
74 #define I7 32
75 
76 /* Aliases used for clearing code. */
77 #define FP I6
78 #define PC I7
79 
80 /* Registers for ThreadRoot. See comment above. */
81 #define InitialPC %o0
82 #define InitialArg %o1
83 #define WhenDonePC %o2
84 #define StartupPC %o3
85 
86 #define PCState (PC/4-1)
87 #define InitialPCState (I0/4-1)
88 #define InitialArgState (I1/4-1)
89 #define WhenDonePCState (I2/4-1)
90 #define StartupPCState (I3/4-1)
91 #endif // HOST_SPARC
92 
93 #ifdef HOST_SNAKE
94 
95 /* Registers that must be saved during a context switch. See comment above. */
96 #define SP 0
97 #define S0 4
98 #define S1 8
99 #define S2 12
100 #define S3 16
101 #define S4 20
102 #define S5 24
103 #define S6 28
104 #define S7 32
105 #define S8 36
106 #define S9 40
107 #define S10 44
108 #define S11 48
109 #define S12 52
110 #define S13 56
111 #define S14 60
112 #define S15 64
113 #define PC 68
114 
115 /* Registers for ThreadRoot. See comment above. */
116 #define InitialPC %r3 /* S0 */
117 #define InitialArg %r4
118 #define WhenDonePC %r5
119 #define StartupPC %r6
120 
121 #define PCState (PC/4-1)
122 #define InitialPCState (S0/4-1)
123 #define InitialArgState (S1/4-1)
124 #define WhenDonePCState (S2/4-1)
125 #define StartupPCState (S3/4-1)
126 #endif // HOST_SNAKE
127 
128 #ifdef HOST_i386
129 
130 /* the offsets of the registers from the beginning of the thread object */
131 #define _ESP 0
132 #define _EAX 4
133 #define _EBX 8
134 #define _ECX 12
135 #define _EDX 16
136 #define _EBP 20
137 #define _ESI 24
138 #define _EDI 28
139 #define _PC 32
140 
141 
142 /* These definitions are used in Thread::AllocateStack(). */
143 #define PCState (_PC/4-1)
144 #define FPState (_EBP/4-1)
145 #define InitialPCState (_ESI/4-1)
146 #define InitialArgState (_EDX/4-1)
147 #define WhenDonePCState (_EDI/4-1)
148 #define StartupPCState (_ECX/4-1)
149 
150 #define InitialPC %esi
151 #define InitialArg %edx
152 #define WhenDonePC %edi
153 #define StartupPC %ecx
154 #endif
155 
156 #endif // SWITCH_H